The same phenomenon occurs when one of the inputs is given logic 0. When two such stable voltage components having different threshold voltages are connected in parallel, then the current flows across the path with less threshold voltage. This is because the base-collector junction of transistor T1 and the base-emitter junction of the output transistor is connected in parallel across the resistors and ground. When one of the inputs to the multi-emitter transistor T1 is at logic 0, then no current flows through the base of the output transistor and the output voltage is high. Thus, the output transistor conducts and the output voltage low or logic 0. This current passes through the base-emitter junction of the output transistor. The positive voltage from VCC flows through the base resistor RB into the base of the transistor T1. A small collector current due to the reverse biasing of the transistor is available at the inputs. When all the inputs are held at high it causes the base-emitter junctions of the multiple-emitter transistor to be reverse-biased. The circuit is shown in the figure below.
The inputs are applied across emitters of a multiple-emitter transistor. Multi-Emitter TTL Gate:Ĭonsider a 3-input TTL NAND gate with a simple output stage. The charge stored in the base has a higher discharging current compared to the DTL gate. The transition speed from logic high to low depends on the speed at which the charge is dissipated. The main difference between the DTL and TTL logic families lies in the operational speed. Now the output voltage is high approximately +5 V. This drives the transistor T1 to cut-off. The charge stored at the base of the transistor T3 does not leak through the resistor instead flows across the forward-biased collector-base junction of transistor T1.
When the input voltage is low, then the base-emitter voltage VBE is more than zero thereby making the current flow through the base resistor to the emitter-base junction of T1 and then to the ground. Transistor T3 is saturated and the output of the gate is 0.2 V. It later passes through the collector-base junction of T1 and into the base of transistor T3. The current from VCC will flow across the base resistor RB. The base-emitter voltage is less and the base-collector voltage, VBE, will be more than zero. When the input voltage is high, then transistor T1 will be in the reverse active region. Let us first consider the working of the basic TTL gate. The circuit of the basic Transistor-Transistor Logic (TTL) gate is shown in the figure below. Working of Transistor-Transistor Logic (TTL) It is also known as T 2L family and was introduced by Texas Instruments in 1964. Transistor-Transistor Logic is the most popular and widely used IC logic family. The NAND gate is the basic building block of this logic family. It is a logic family implemented with bipolar process technology that combines or integrates NPN transistors, PN junction diodes, and diffused resistors in a single monolithic structure to get the desired logic function. TTL as outlined above stands for Transistor-Transistor Logic. Totem Pole Transistor-Transistor Logic (TTL):.Disadvantage of Single Output Stage TTL:.Working of Transistor-Transistor Logic (TTL).Differences between Black Box Testing vs White Box Testing.Class method vs Static method in Python.Search an element in a Linked List (Iterative and Recursive).Find Length of a Linked List (Iterative and Recursive).Write a function to delete a Linked List.Delete a Linked List node at a given position.
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